SRC
Detailed Description
The address contained within the specified register pair designates either a particular DATA RAM data character, a DATA RAM status character, a RAM output port, or a ROM input/output port. However, the address designates all of these simultaneously; it is up to the programmer to then write the correct I/O or RAM instruction to access the proper entity.
The disassembly of the instruction below shows how the register pair are represented in the opcode.
The address sent by the SRC remains in effect until changed by a subsequent SRC.
The only DATA RAM bank which receives the SRC address is the one selected by the last previous DCL instruction.
The 8 bits of the address sent by the SRC are interpreted in one of four ways, depending on the context as follows:
When referring to a DATA RAM Character
When referring to a DATA RAM Status Character
When referring to a DATA RAM Output Port
When referring to a ROM I/O Port
Example program
/ Example program
org ram
fim 1p 180
src 1p
end